Some types of field effect transistors (FETs) have three-dimensional, non-planar configurations including fin-like structures extending above substrates. Such field effect transistors are referred to as FinFETs. The substrates may include semiconductor on insulator (SOI) substrates or bulk semiconductor substrates. Silicon fins are formed in some FinFETs on substrates via known technology such as sidewall image transfer (SIT). FinFET structures including SOI substrates can be formed, in part, by selectively etching the crystalline silicon layers down to the oxide or other insulating layers thereof following photolithography. Active fin heights are set by SOI thickness when employing SOI substrates. In bulk FinFETs, active fin height is set by oxide thickness and etched fin height. At least the bottom portions of the fins of bulk FinFETs should be doped to avoid source-to-drain leakage below the gate. The gates of FinFETs can be formed using a “gate-first” process wherein a gate stack and spacers are formed prior to selective epitaxial growth wherein source and drain regions are enlarged. A “gate-last” process may alternatively be employed wherein the source/drain regions are formed immediately following fin patterning. Gate-last procedures can involve making a dummy gate, fabricating other elements of the transistor, removing the dummy gate, and replacing the removed dummy gate with actual gate materials.
Doped semiconductor material such as silicon germanium (SiGe) may be provided by selective epitaxial growth on the sidewalls of the fin structure(s) during fabrication of FinFETs. Such growth results in faceted structures that, in some cases, merge into a continuous volume.
FIG. 4 is a schematic illustration of a prior art FinFET structure 20 having multiple silicon fins 22 formed from a SOI substrate 24 including base and buried oxide (BOX) layers 25, 27, the fins adjoining the BOX layer 25 and being merged by a semiconductor layer 26 subsequently grown on the substrate. The semiconductor layer 26 of the exemplary structure is comprised of doped silicon germanium grown epitaxially thereon (on the fins) which increases the volumes of the source/drain regions. Such epitaxial growth proceeds from the fins 22 to self-limited, diamond-shaped volumes Exemplary defects 28 are shown in the structure, it being appreciated that additional defects in the merged epitaxy will be present, particularly where n-doped epitaxy is employed. Unfilled areas 29 are also present near the base portions of the fins 22. Problems associated with such structures include rough merge surfaces, local unmerged areas, and defects.
FIG. 7 is a schematic illustration of a second prior art FinFET structure 40 including unmerged epitaxy in the source/drain areas. Uniform fin structures facilitate the formation of diamond-shaped volumes 44 of doped semiconductor material, for example SiGe. The epitaxial growth of ideally shaped volumes depends on various factors, including fin height, fin shape, fin spacing (pitch), fin erosion, box gauging, and fin cleaning Accidental merging of the epitaxially grown source/drain regions at one or more points should be avoided in the fabrication of such structures. The diamond-shaped volumes 44 provide only limited, non-uniform amounts of dopants to the fins 22, with relatively low amounts being provided to the bottom portions of the fins. Merge defects characterizing some FinFET structures such as the structure 20 discussed above are avoided.